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dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 1 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 16 ? , low parasitic capacitance and leakage, +12 v / +5 v / +3 v / 5 v quad spst switches description the dg411le, dg412le, and dg413le are monolithic quad single-pole-single-throw analog switches. the dg411le and dg412le differ only in that they respond to opposite logic levels. the dg 413le has two normally open and two normally closed switches. it can be given various configurations, including four spst, two spdt, and one dpdt. the dg411le, dg412le, and dg413le offer low on resistance of 16 ? , low parasitic capa citance of 15 pf switch on capacitance, and low charge injection over the signal swing range. the dg411le, dg412le, and dg413le operate on single and dual supplies. single supp ly voltage ranges from 3 v to 16 v while dual supply oper ation is recommended with 3 v to 8 v. each switch conducts equally well in both direction when on, and blocks input voltages up to the supply levels when off. the dg411le, dg412le, and dg413le are available in 16 lead tssop, soic, and pdip packages. features ? 3 v to 16 v single supply or 3 v to 8 v dual supply ? on-resistance r ds(on) : 16 ? ? low parasitic capacitance: ? c d(on) : 15 pf ? c s(off) : 5 pf ? less than 8 pc charge injection over the full signal swing range ? fast switching t on : 16 ns ? t off : 9 ns ? ttl, cmos compatible ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 note ? * this datasheet provides information about parts that are ? rohs-compliant and / or parts th at are non-rohs-compliant. for ? example, parts with lead (pb) te rminations are not rohs-compliant. ? please see the information / tables in this datasheet for details. benefits ? wide operation voltage range ? low signal errors and distortion ?fast switching time ? minimized switching glitch applications ? automatic test equipment ? data acquisition systems ? meters and instruments ? medical and healthcare systems ? communication systems ? audio and video signal routing ? relay replacement ? battery powered systems ? computer peripherals ? audio and video signal routing functional block diagram and pin configuration available available 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in 1 in 2 d 1 d 2 s 1 s 2 v- v+ gnd v l s 4 s 3 d 4 d 3 in 4 in 3 dg411le, dg412le dual-in-line, tssop and soic 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in 1 in 2 d 1 d 2 s 1 s 2 v- v+ gnd v l s 4 s 3 d 4 d 3 in 4 in 3 dg413le dual-in-line, tssop and soic
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 2 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 logic 0 ? 0.8 v ? logic 1 ? 2.4 v logic 0 ? 0.8 v ? logic 1 ? 2.4 v notes a. signals on s x , d x , or in x exceeding v+ or v- will be clamped by internal diodes. limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 7 mw/c above 75 c. d. derate 7.6 mw/c above 75 c e. derate 12 mw/c above 75 c. ? stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. truth table logic dg411le dg412le 0onoff 1offon truth table logic sw 1 , sw 4 sw 2 , sw 3 0offon 1onoff ordering information temp. range configuration package par t number min. order / pack. quantity -40 c to +85 c lead-free dg411le 16-pin tssop dg411ledq-ge3 tube 360 units dg411ledq-t1-ge3 tape and reel, 3000 units 16-pin soic dg411ledy-ge3 tube 500 units dg411ledy-t1-ge3 tape and reel, 2500 units 16-pin pdip dg411ledj-ge3 tube 500 units dg412le 16-pin tssop dg412ledq-ge3 tube 360 units dg412ledq-t1-ge3 tape and reel, 3000 units 16-pin soic dg412ledy-ge3 tube 500 units DG412LEDY-T1-GE3 tape and reel, 2500 units 16-pin pdip dg412ledj-ge3 tube 500 units dg413le 16-pin tssop dg413ledq-ge3 tube 360 units dg413ledq-t1-ge3 tape and reel, 3000 units 16-pin soic dg413ledy-ge3 tube 500 units dg413ledy-t1-ge3 tape and reel, 2500 units 16-pin pdip dg413ledj-ge3 tube 500 units absolute maximum ratings parameter limit unit v+ to v- -0.3 to +18 v gnd to v- 18 v l (gnd -0.3) to (v+) +0.3 i n a , v s , v d -0.3 to (v+) +0.3 or 30 ma, whichever occurs first continuous current (any terminal) 30 ma peak current, s or d (pulsed 1 ms, 10 % duty cycle) 100 storage temperature (dq, dy suffix) -65 to +125 c (ak suffix) -65 to +150 power dissipation (packages) b 16-pin tssop c 450 mw 16-pin soic d 650 16-pin cerdip e 900 esd human body model (hbm); per ansi / esda / jedec ? js-001 2500 v latch up current, per jesd78d 400 ma
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 3 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet. e. guaranteed by design, not su bject to prod uction test. f. v in = input voltage to pe rform proper function. g. leakage parameters are guaranteed by worst ca se test conditions an d not subject to test. specifications a (single supply 12 v) parameter symbol test conditions unless otherwise specified v+ = 12 v, v- = 0 v v l = 5 v, v in = 2.4 v, 0.8 v f temp. b typ. c a suffix limits -55 c to +125 c d suffix limits -40 c to +85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - 0 12 0 12 v drain-source on-resistance r ds(on) v+ = 10.8 v, v- = 0 v i s = 10 ma, v d = 2/9 v room 16 - 26 - 26 ? full - - 40 - 35 switch off leakage current i s(off) v d = 1/11 v, v s = 11/1 v room - -1 1 -1 1 na full - -15 15 -10 10 i d(off) room - -1 1 -1 1 full - -15 15 -10 10 channel on leakage current i d(on) v s = v d = 11/1 v room - -1 1 -1 1 full - -15 15 -10 10 digital control input current, vin low i il v in under test = 0.8 v full 0.01 -1.5 1.5 -1 1 a input current, vin high i ih v in under test = 2.4 v full -1.5 1.5 -1 1 dynamic characteristics turn-on time t on r l = 300 ? , c l = 35 pf, v s = 5 v, see figure 2 room 16 - 50 - 50 ns full - - 70 - 60 turn-off time t off room 9 - 30 - 30 full - - 48 - 40 break-before-make ? time delay t d dg413l only, v s = 5 v, r l = 300 ? , cl = 35 pf room 5 - - - - charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 6.6 - - - - pc off-isolation e oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room 68.4 - - - - db channel-to-channel crosstalk e x talk room 114 - - - - source off capacitance e c s(off) f = 1 mhz room 5 - - - - pf drain off capacitance e c d(off) room 6 - - - - channel-on capacitance e c d(on) room 15 - - - - power supplies positive supply current i+ v in = 0 v or 5 v room 0.02 - 1 - 1 a full - - 7.5 - 5 negative su pply current i- room -0.002 -1 - -1 - full - -7.5 - -5 - logic supply current i l room 0.002 - 1 - 1 full - - 7.5 - 5 ground current i gnd room -0.002 -1 - -1 - full - -7.5 - -5 -
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 4 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet. e. guaranteed by design, not su bject to prod uction test. f. v in = input voltage to pe rform proper function. g. leakage parameters are guaranteed by worst ca se test conditions an d not subject to test. specifications a (dual supply 5 v) parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = -5 v v l = 5 v, v in = 2.4 v, 0.8 v f temp. b typ. c a suffix limits -55 c to +125 c d suffix limits -40 c to +85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - -5 5 -5 5 v drain-source on-resistance r ds(on) v+ = 5 v, v- = -5 v, i s = 10 ma, v d = 3.5 v room 18 - 30 - 30 ? full - - 42 - 37 switch off ? leakage current g i s(off) v+ = 5.5, v- = -5.5 v, v d = 4.5 v, v s = 4.5 v room - -1 1 -1 1 na full - -15 15 -10 10 i d(off) room - -1 1 -1 1 full - -15 15 -10 10 channel on ? leakage current g i d(on) v+ = 5.5 v, v- = -5.5 v, v s = v d = 4.5 v room - -1 1 -1 1 full - -15 15 -10 10 digital control input current, v in low e i il v in under test = 0.8 v full 0.05 -1.5 1.5 -1 1 a input current, v in high e i ih v in under test = 2.4 v full 0.05 -1.5 1.5 -1 1 dynamic characteristics turn-on time e t on r l = 300 ?? , c l = 35 pf, v s = 3.5 v, see figure 2 room 17 - 50 - 50 ns full - - 70 - 60 turn-off time e t off room 12 - 35 - 35 full - - 50 - 40 break-before-make time delay e t d dg413l only, v s = 3.5 v, r l = 300 ?? , c l = 35 pf room 5 - - - - charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 5.8 - - - - pc off isolation e oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room 68 - - - - db channel-to-channel crosstalk e x talk room 113 - - - - source off capacitance e c s(off) f = 1 mhz room 5 - - - - pf drain off capacitance e c d(off) room 6 - - - - channel on capacitance e c d(on) room 14 - - - - power supplies positive supply current e i+ v in = 0 v or 5 v room 0.03 - 1 - 1 a full - - 7.5 - 5 negative supply current e i- room -0.002 -1 - -1 - full - -7.5 - -5 - logic supply current e i l room 0.002 - 1 - 1 full - - 7.5 - 5 ground current e i gnd room -0.002 -1 - -1 - full - -7.5 - -5 -
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 5 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet. e. guaranteed by design, not su bject to prod uction test. f. v in = input voltage to pe rform proper function. g. leakage parameters are guaranteed by worst ca se test conditions an d not subject to test. specifications a (single supply 5 v) parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = 0 v v l = 5 v, v in = 2.4 v, 0.8 v f temp. b typ. c a suffix limits -55 c to +125 c d suffix limits -40 c to +85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - - 5 - 5 v drain-source on-resistance e r ds(on) v+ = 4.5 v, i s = 5 ma, v d = 1 v, 3.5 v room 36 - 50 - 50 ? full - - 88 - 75 dynamic characteristics turn-on time e t on r l = 300 ? , c l = 35 pf, v s = 3.5 v, see figure 2 room 27 - 50 - 50 ns hot - - 90 - 60 turn-off time e t off room 15 - 30 - 30 hot - - 55 - 40 break-before-make time delay e t d dg413l only, v s = 3.5 v, r l = 300 ? , c l = 35 pf room 11 - - - - charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 3.3 - - - - pc power supplies positive supply current e i+ v in = 0 v or 5 v room 0.02 - 1 - 1 a hot - - 7.5 - 5 negative supply current e i- room -0.002 -1 - -1 - hot - -7.5 - -5 - logic supply current e i l room 0.002 - 1 - 1 hot - - 7.5 - 5 ground current e i gnd room -0.002 -1 - -1 - hot - -7.5 - -5 -
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 6 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet. e. guaranteed by design, not su bject to prod uction test. f. v in = input voltage to pe rform proper function. g. leakage parameters are guaranteed by worst ca se test conditions an d not subject to test. specifications a (single supply 3 v) parameter symbol test conditions unless otherwise specified v+ = 3 v, v- = 0 v v l = 3 v, v in = 0.4 v, 2.0 v f temp. b typ. c a suffix limits -55 c to +125 c d suffix limits -40 c to +85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - 0 3 0 3 v drain-source ? on-resistance r ds(on) v+ = 2.7 v, v- = 0 v, i s = 5 ma, v d = 0.5, 2.2 v room 106 - 130 - 130 ? full - - 150 - 140 switch off ? leakage current g i s(off) v+ = 3.3, v- = 0 v, v d = 1, 2 v, v s = 2, 1 v room - -1 1 -1 1 na full - -15 15 -10 10 i d(off) room - -1 1 -1 1 full - -15 15 -10 10 channel on ? leakage current g i d(on) v+ = 3.3 v, v- = 0 v, v s = v d = 1, 2 v room - -1 1 -1 1 full - -15 15 -10 10 digital control input current, v in low i il v in under test = 0.4 v full 0.005 -1.5 1.5 -1 1 a input current, v in high i ih v in under test = 2.4 v full 0.005 -1.5 1.5 -1 1 dynamic characteristics turn-on time t on r l = 300 ? , c l = 35 pf, v s = 1.5 v, see figure 2 room 57 - 85 - 85 ns full - - 150 - 110 turn-off time t off room 25 - 60 - 60 full - - 100 - 85 break-before-make time delay t d dg413l only, v s = 1.5 v, r l = 300 ? , c l = 35 pf room24---- charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 2 - - - - pc off isolation e oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room68---- db channel-to-channel crosstalk e x talk room 107 - - - - source off capacitance e c s(off) f = 1 mhz room6---- pf drain off capacitance e c d(off) room7---- channel on capacitance e c d(on) room15----
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 7 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) r ds(on) vs. drain voltage (single supply) r ds(on) vs. drain voltage and temperature r ds(on) vs. drain voltage and temperature r ds(on) vs. drain voltage and temperature (single supply) supply current vs. temperature switching time vs. single supply 0 10 20 30 40 50 60 70 80 90 0246810121416 r on -on-re s i s tance ( ) v d - analog voltage (v) v+ = +3.0 v v+ = +12.0 v v+ = +5.0 v v+ = +16.0 v t a = 25 c i s = 10 ma 0 5 10 15 20 25 30 0123456789101112 r on -on-re s i s tance ( ) v d - analog voltage (v) +125 c +85 c +25 c -40 c v+ = +12 v i s = 10 ma -55 c 10 15 20 25 30 35 40 45 50 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 r on -on-re s i s tance ( ) v d - analog voltage (v) +125 c +85 c +25 c -40 c v+ = +5 v i s = 10 ma -55 c 6 8 10 12 14 16 18 20 22 24 -8-6-4-202468 r on -on-re s i s tance ( ) v d - analog voltage (v) v = 8.0 v t a = 25 c i s = 10 ma v = 5.0 v 0 5 10 15 20 25 30 35 -5 -4 -3 -2 -1 0 1 2 3 4 5 r on -on-re s i s tance ( ) v d -analog voltage (v) +125 c +85 c +25 c -40 c v = 5.0 v i s = 10 ma -55 c 0 10 20 30 40 50 60 70 80 90 100 -40-200 20406080100120 i+ - s upply current (na) temperature ( c) v+ = +5.5 v v- = 0 v in = 0 v
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 8 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) leakage current vs. drain voltage switching time vs. single supply voltage switching time vs. dual supply voltage charge injection vs. drain voltage threshold vs. single supply current drain capacitance vs. drain voltage (single supply) -40 -30 -20 -10 0 10 20 30 40 -5-4-3-2-1012345 leakage current (pa) v d - drain voltage (v), v s = -v d v+ = +5 v i d(on) i d(off) i s (off) 0 5 10 15 20 25 30 35 40 45 50 55 60 246810121416 s witching s peed (n s ) v+ - po s itive s upply voltage (v) s ingle s upply t on t off 0 5 10 15 20 25 30 345678 s witching s peed (n s ) v+/- - po s itive s upply voltage (v) dual s upply t on t off 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 q inj - charge injection (pc) v d - analog voltage (v) v = 5 v v+ = 12 v v+ = 5 v v+ = 3v 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 246810121416 v th - thre s hold (v) v+ - po s itive s upply voltage (v) v ih v il v l = v+ (for v+ < 5 v) and 5 v (v+ 5 v) 0 2 4 6 8 10 12 14 16 18 20 0123456789101112 capacitance (pf) analog voltage (v) c d ( on ) , v+ = +12 v s ingle s upply c d(on) , v+ = +5 v c d(on) , v+ = +3 v c s (off) , v+ = +12 v c s (off) , v+ = +5 v c d(off) , v+ = +12 v c d(off) , v+ = +3 v c s (off) , v+ = +3 v c d(off) , v+ = +5 v
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 9 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) drain capacitance vs. drain voltage (dual supply) insertion loss, off is olation and crosstalk vs. frequency schematic diagram (typical channel) fig. 1 0 2 4 6 8 10 12 14 16 18 20 -5 -4 -3 -2 -1 0 1 2 3 4 5 capacitance (pf) analog voltage (v) dual s upply c d(on) , v = 5 v c s (off) , v = 5 v c d(off) , v = 5 v -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 100k 1m 10m 100m 1 g lo ss , oirr, x talk (db) fre q uency (hz) in s ertion lo ss , -3 db = 301 mhz v+ = +3 v v- = 0 v oirr x talk le v el shift/ dri v e v in v l s v+ gnd v- d v- v+
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 10 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 2 - switching time fig. 3 - break-before-make (dg413le) fig. 4 - charge injection 0 v logic input switch input* switch output 3 v 50% 0 v switch input* v s t r < 20 ns t f < 20 ns 90 % - v s t on t on v o 90 % v o note: logic input wa v eform is in v erted for switches that ha v e the opposite logic sense control c l (includes fixture and stray capacitance) v+ in r l r l + r ds(on) v o = v s s d v- v o gnd v l c l 35 pf v- r l 300 v l v+ v s 0 v logic input switch switch output 3 v 50 % 0 v output 0 v 90 % v o2 v o1 90 % v s1 v s2 t d t d v o2 c l (includes fixture and stray capacitance) v+ s 2 v- s 1 v l v s2 in 2 d 2 v s1 r l2 300 d 1 v o1 c l2 35 pf gnd r l1 300 c l1 35 pf in 1 v- c l 10 nf d r g v o v+ s v- 3 v in v l v g gnd off on off off on off v o v o in x in x q = v o x c l in x dependent on switch configuration input polarity determined b y sense of switch. v- v+ v l
dg411le, dg412le, dg413le www.vishay.com vishay siliconix s16-0391-rev. a, 07-mar-16 11 document number: 78091 for technical questions, contact: analogswitchsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 5 - crosstalk fig. 6 - off-isolation fig. 7 - source / drain capacitances ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?78091 . 0 v , 2.4 v s 1 x talk isolation = 20 log v s v o d 2 c = rf b ypass r l d 1 s 2 v s 0 v, 2.4 v in 1 50 v o in 2 r g = 50 v l v+ gnd v - nc c cc v+ v- v l r l 50 d 0 v, 2.4 v v+ r g = 50 gnd v- c v s off isolation = 20 log v s v o in v l v o c s c c = rf bypass v- v+ v l d in s v l v+ gnd v - c 0 v, 2.4 v meter hp4192a impedance analyzer or equi v alent cc v lv+ v-
all leads 0.101 mm 0.004 in e h c d e b a1 l 4 3 12 8 7 56 13 14 16 15 9 10 12 11 package information vishay siliconix document number: 71194 02-jul-01 www.vishay.com 1
jedec part number: ms-012 dim min max min max a 1.35 1.75 0.053 0.069 a 1 0.10 0.20 0.004 0.008 b 0.38 0.51 0.015 0.020 c 0.18 0.23 0.007 0.009 d 9.80 10.00 0.385 0.393 e 3.80 4.00 0.149 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 l 0.50 0.93 0.020 0.037 0 8 0 8 ecn: s-03946?rev. f, 09-jul-01 dwg: 5300
e 1 e q 1 a l a 1 e 1 b b 1 s c e a d 15 max 12345678 16 15 14 13 12 11 10 9 package information vishay siliconix document number: 71261 06-jul-01 www.vishay.com 1

dim min max min max a 3.81 5.08 0.150 0.200 a 1 0.38 1.27 0.015 0.050 b 0.38 0.51 0.015 0.020 b 1 0.89 1.65 0.035 0.065 c 0.20 0.30 0.008 0.012 d 18.93 21.33 0.745 0.840 e 7.62 8.26 0.300 0.325 e 1 5.59 7.11 0.220 0.280 e 1 2.29 2.79 0.090 0.110 e a 7.37 7.87 0.290 0.310 l 2.79 3.81 0.110 0.150 q 1 1.27 2.03 0.050 0.080 s 0.38 1.52 .015 0.060 ecn: s-03946?rev. d, 09-jul-01 dwg: 5482
vishay siliconix package information document number: 74417 23-oct-06 www.vishay.com 1 symbols dimensions in millimeters min nom max a - 1.10 1.20 a1 0.05 0.10 0.15 a2 - 1.00 1.05 b 0.22 0.28 0.38 c - 0.127 - d 4.90 5.00 5.10 e 6.10 6.40 6.70 e1 4.30 4.40 4.50 e-0.65- l 0.50 0.60 0.70 l1 0.90 1.00 1.10 y--0.10 1036 ecn: s-61920-rev. d, 23-oct-06 dwg: 5624 tssop: 16-lead
pad pattern www.vishay.com vishay siliconix revision: 02-sep-11 1 document number: 63550 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 recommended minimum pad for tssop-16 0.281 (7.15) recommended minimum pads dimensions in inches (mm) 0.171 (4.35) 0.055 (1.40) 0.012 (0.30) 0.026 (0.65) 0.014 (0.35) 0.193 (4.90)
application note 826 vishay siliconix www.vishay.com document number: 72608 24 revision: 21-jan-08 application note recommended minimum pads for so-16 recommended minimum pads for so-16 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.152 (3.861) 0.047 (1.194) 0.028 (0.711) 0.050 (1.270) 0.022 (0.559) 0.372 (9.449) return to index return to index
legal disclaimer notice www.vishay.com vishay revision: 13-jun-16 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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